MOS image pick-up device and camera incorporating the same

ABSTRACT

A MOS image pick-up device including a semiconductor substrate, an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region including a driving circuit for operating the imaging region formed on the semiconductor substrate; the unit pixels include a photodiode, MOS (metal-oxide-semiconductor) transistors and a first device-isolation portion, the peripheral circuit region includes a second device-isolation portion for isolating devices in the driving circuit; wherein each of the first device-isolation portion and the second device-isolation portion is at least one portion selected from an electrically insulating film formed on the substrate in order not to erode the substrate, a electrically insulating film formed on the substrate so as to erode the substrate to a depth ranging from 1 nm to 50 nm, and an impurity diffusion region formed within the substrate. The MOS image pick-up device is incorporated in a camera. Thereby, devices are isolated between MOS transistors, and noise caused by leakage current is decreased.

FIELD OF THE INVENTION

The present invention relates to a MOS image pick-up device that is usedfor a digital camera or the like, and a camera incorporating the same.

BACKGROUND OF THE INVENTION

A MOS image pick-up device denotes an image sensor that amplifies andreads signals of respective pixels by using amplifying circuitsincluding MOS transistors formed on the respective pixels. Recently,such MOS image pick-up devices, particularly, so-called CMOS(complementary MOS) image sensors manufactured in a CMOS process, havebeen marked as image-inputting devices in portable apparatuses such asminiature cameras for PCs, due to the merits, e.g., they require lowvoltages and consume less power, and the sensors can be integrated withperipheral circuits so as to form a one-chip device.

In a conventional MOS image pick-up device, every circuit in theperipheral circuit region is designed using a CMOS technique to applyboth n-channel MOS transistors and p-channel MOS transistors. In theimaging region, all of the MOS transistors composing each pixel aren-channel MOS transistors. In general, the n-channel MOS transistorscomposing the pixel are identified with n-channel MOS transistors usedin the peripheral circuit region.

FIG. 4 is a cross-sectional view showing a structure of a CMOStransistor used for a peripheral circuit region of a conventional MOSimage pick-up device. In a semiconductor substrate 21, an n-type well 26and a p-type well 25 are formed. A p-channel MOS transistor 22 is formedin the n-type well 26, and an n-channel MOS transistor 23 is formed inthe p-type well 25. These transistors are isolated electrically fromeach other by device-isolation portions 24. The device-isolationportions 24 are oxide films 27 formed by LOCOS (local oxidation ofsilicon). For further miniaturization, oxide films 28 formed by STI(shallow trench isolation) are used for the electron-isolating portionsas shown in FIG. 5.

Since the MOS image pick-up device includes an amplifying circuit ineach pixel as described above, it can amplify weak signals so as torealize high sensitivity. On the other hand, when a large amount ofcurrent leaks into the photodiode, the leakage current may be amplifiedand cause a considerable noise.

In the above-described conventional MOS image pick-up device, n-channelMOS transistors composing the pixel are regarded as identical in thestructure to the n-channel MOS transistors used in the peripheralcircuit region, i.e.. n-channel MOS transistors of a CMOS transistor.Moreover, the device-isolation portions among the transistors areconsidered to have a common structure in the imaging region and theperipheral region.

However, the CMOS transistors used for the peripheral circuit region aredeveloped in a trend for miniaturizing semiconductor LSI. Therefore, themain object in development of the CMOS transistors is a high-speedprocess, while substantially no attention is paid for leakage current.For example, in a CMOS transistor shown in FIG. 4, the oxide films 27used for the device-isolation portions are formed by thermally oxidizingthe substrate 21, and thus they erode the substrate 21 by approximatelyhalf of the film thickness. In the CMOS transistor shown in FIG. 5, theoxide films 28 used for the device-isolation portions fill trenchesformed on the substrate 21, so that the films erode the substrate 21 bytheir entire thickness. Since the substrate will be subjected to a greatstress at parts eroded by the oxide films in the device-isolationportions, a large leakage current will occur. When the device-isolatingstructure of the CMOS transistor is used for an imaging region, noisedue to the leakage current will be increased considerably.

SUMMARY OF THE INVENTION

For solving the above-described problems in the conventional techniques,the present invention provides a MOS image pick-up device that decreasesnoise caused by leakage current, and also a camera using the MOS imagepick-up device.

For achieving the above-described object, a MOS image pick-up deviceaccording to the present invention has a semiconductor substrate, animaging region formed on the semiconductor substrate by arraying pluralunit pixels, and a peripheral circuit region including a driving circuitfor operating the imaging region formed on the semiconductor substrate,wherein each unit pixel has a photodiode, MOS(metal-oxide-semiconductor) transistors and a first device-isolationportion, and the peripheral circuit region includes a seconddevice-isolation portion for isolating devices in the driving circuit.The MOS image pick-up device is characterized in that each of the firstdevice-isolation portion and the second device-isolation portion is atleast one selected from: A) an electrically isolating film formed on thesubstrate in order not to erode the substrate; B) an electricallyinsulating film formed on the substrate so as to have a depth erodingthe substrate in a range of 1 nm to 50 nm; and C) an impurity diffusionregion formed within the substrate.

Next, a camera according to the present invention incorporates a MOSimage pick-up device that has a semiconductor substrate, an imagingregion formed on the semiconductor substrate by arraying plural unitpixels, and a peripheral circuit region including a driving circuit foroperating the imaging region formed on the semiconductor substrate,wherein each unit pixel has a photodiode, MOS (metal-oxidesemiconductor) transistors and a first device-isolation portion, and theperipheral circuit region includes a second device-isolation portion forisolating devices in the driving circuit. The camera is characterized inthat each of the first device-isolation portion and the seconddevice-isolation portion is at least one selected from: A) anelectrically isolating film formed on the substrate in order not toerode the substrate; B) an electrically insulating film formed on thesubstrate so as to have a depth eroding the substrate in a range of 1 nmto 50 nm; and C) an impurity diffusion region formed within thesubstrate.

In the present invention, the ‘first device-isolation portion’ is formedto electrically isolate devices existing in a pixel.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a cross-sectional view showing an example of device-isolationportions according to a first embodiment of the present invention.

FIG. 1B is a cross-sectional view showing an example of device-isolationportions according to a second embodiment.

FIG. 2 is a schematic view showing a configuration of a MOS imagepick-up device according to the present invention.

FIG. 3 is a circuit diagram showing an example of a dynamic circuit thatcan be used for a driving circuit of a MOS image pick-up device of thepresent invention.

FIG. 4 is a cross-sectional view showing a structure of a CMOStransistor and its device-isolation portions for composing aconventional MOS image pick-up device.

FIG. 5 is a cross-sectional view showing a structure of a CMOStransistor and its device-isolation portions for composing aconventional MOS image pick-up device.

FIG. 6 is a graph for comparing leakage currents that vary depending onisolation oxide films in the first embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

In the present invention, each of the first device-isolation portion andthe second device-isolation portion is at least one of: A) anelectrically isolating film formed on the substrate in order not toerode the substrate; B) an electrically insulating film formed on thesubstrate so as to have a depth eroding the substrate in a range of 1 nmto 50 nm; and C) an impurity diffusion region formed within thesubstrate. Therefore, stress applied to the substrate is decreased andthe leakage current can be inhibited. As a result, noise caused by theleakage current can be decreased. When the device-isolation portion is afilm of B), stress applied to the device-isolation portion can bedecreased and the leakage current can be inhibited since the erosiondepth into the substrate is shallow, i.e., it is controlled within arange of 1 nm to 50 nm.

It is preferable in the MOS image pick-up device that the impuritydiffusion region is formed by ion implantation.

It is preferable in the MOS image pick-up device that the insulatingfilm has a thickness ranging from 1 nm to 500 nm.

It is preferable in the MOS image pick-up device that in the imagingregion the first device-isolation portion formed adjacent to thephotodiode is composed of an impurity diffusion region formed in thesubstrate.

It is preferable in the MOS image pick-up device that at least one partof the driving circuit is a dynamic circuit, thereby decreasing theenergy consumption.

It is preferable in the MOS image pick-up device that a dark currentinhibiting layer is formed in the surface layer of the photodiode,thereby inhibiting leakage current occurring due to defects in thevicinity of the substrate surface on the photodiode.

As described above, according to a MOS image pick-up device of thepresent invention where device-isolation portions among MOS transistorshave a particular structure, noise caused by leakage current can bedecreased.

The details will be described below with reference to the attacheddrawings.

FIG. 2 shows an example of a MOS image pick-up device of the presentinvention. This solid-state imaging device has an imaging region 7 withplural pixels 6 arranged one-dimensionally or two-dimensionally, and aperipheral circuit region arranged around the imaging region.

This MOS image pick-up device includes, on a semiconductor substrate, animaging region 7 in which plural pixels 6 are arrayed two-dimensionally,a vertical shift resistor 8 and a horizontal shift resistor 9 forselecting pixels, and a timing-generation circuit 10 for feeding pulsesnecessary for the shift resistors (hereinafter, a region other than theimaging region 7 is expressed as ‘a peripheral circuit region’, whichincludes the vertical shift resistor 8, the horizontal shift resistor 9,and the timing-generation circuit 10). In the imaging region 7, each ofthe pixels 6 is composed of a photodiode 1 and four MOS transistors,i.e., a charge-transferring transistor 2, a resetting transistor 3, anamplifying transistor 4 and a selecting transistor 5. In the peripheralcircuit region, the vertical shift resistor 8, the horizontal shiftresistor 9 and the timing-generation circuit 10 are composed by usingplural MOS transistors.

Each of the pixels 6 composing the imaging region 7 includes thephotodiode 1 and the four MOS transistors, i.e., the charge-transferringtransistor 2, the resetting transistor 3, the amplifying transistor 4and the selecting transistor 5. The charge-transferring transistor 2uses the photodiode 1 as a source, and its drain is electricallyconnected with a gate of the amplifying transistor 4. The amplifyingtransistor 4 has a drain that is electrically connected with a powersupply voltage and a source that is electrically connected with a drainof the selecting transistor 5. The resetting transistor 3 has a sourcethat is electrically connected with a drain of the charge-transferringtransistor 2 and also a source that is electrically connected with apower supply voltage. The selecting transistor 5 has a source connectedto an output line.

The following is a brief explanation about functions of the respectivetransistors. The charge-transferring transistor 2 transfers signalcharge generated due to a photoelectric exchange at the photodiode 1into a detecting portion (the drain of the charge-transferringtransistor 2). The detecting portion stores signal charge and inputs avoltage corresponding to the electric charge into the amplifyingtransistor 4. The amplifying transistor 4 amplifies the voltage of thedetecting portion, and the selecting transistor 5 as a switch for takingout output of the amplifying transistor 4 selects a pixel for readingthe signal. The resetting transistor 3 discharges the signal electriccharge stored in the detecting portion at a predetermined time interval.

FIG. 1A and FIG. 1B are cross-sectional views showing examples of MOStransistors and the peripheral structures. In each MOS transistor 12, asource 14 and a drain 15 as n-type diffusion regions are formed within ap-type semiconductor substrate 11 (or a p-type well). Agate electrode 17is formed on a part of the semiconductor substrate 11 through aninsulating film 16, and the gate electrode 17 is located between thesource 14 and the drain 15.

As shown in FIGS. 1A and 1B, respective MOS transistors 12 areelectrically isolated from each other by device-isolation portions 13.Each device-isolation portion 13 can be configured by forming anisolation oxide film 18 on the semiconductor substrate 11 as shown inFIG. 1A. Alternatively, the device-isolation portion 13 can beconfigured by forming an isolation-diffusion region 19 within thesemiconductor substrate 11 as shown in FIG. 1B. Alternatively, both theisolation oxide film 18 and the isolation-diffusion region 19 can beformed together. Structures of the device-isolation portions will bedetailed later.

The photodiode 1 is an n-type diffusion region formed within the p-typesemiconductor substrate (or a p-type well). As described above, thephotodiode composes a source of a charge-transferring transistor, andsimilar to the sources for other MOS transistors, a device-isolationportion is formed in a region adjacent to a photodiode.

It is further preferable that a p-type diffusion region is formed as adark current inhibiting layer on the surface layer part of the n-typediffusion region as a photodiode. In this case, it is preferable thatthe dark current inhibiting layer extends to the device-isolationportion formed adjacent to the photodiode. That is, when thedevice-isolation portion is composed of an isolation oxide film,preferably, it extends below the isolation oxide film. When thedevice-isolation portion is composed of an isolation-diffusion region,the dark current inhibiting layer preferably extends into theisolation-diffusion region.

Although an n-channel MOS transistor is shown as an example of MOStransistors composing the respective pixels, it is also possible to usea p-channel MOS transistor. In this case, the MOS transistor has astructure where a source as a p-type diffusion region and a drain areformed in an n-type semiconductor substrate (or n-type well). Thephotodiode is composed of a p-type diffusion region, and the darkcurrent inhibiting layer is composed of an n-type diffusion region.

As shown in FIG. 2, a peripheral circuit region includes a horizontalshift resistor 8 and a vertical shift resistor 9 for pixel selection,and a driving circuit such as a timing-generation circuit 10 for feedingpulses necessary for operation of the shift resistors.

In the peripheral circuit, it is preferable that the driving circuit iscomposed of a dynamic circuit for decreasing power consumption. FIG. 3is a circuit diagram showing an example of a dynamic circuit availablefor the horizontal shift resistor and the vertical shift resistor.

Since a typical dynamic circuit retains data dynamically in capacitors(20a, 20b and 20c in FIG. 3), a great leakage current can destroy data.However, this embodiment can solve this problem since a structure fordecreasing the leakage current is used for the device-isolation portionsthat isolate MOS transistors of the driving circuit.

A driving circuit contains plural MOS transistors, and the MOStransistors are electrically isolated from each other bydevice-isolation portions. The device-isolation portions can beconfigured similar to the device-isolation portions in an imagingregion. That is, each device-isolation portion can be configured byforming an isolation oxide film on the semiconductor substrate; formingan isolation-diffusion region within the semiconductor substrate; orforming both the isolation oxide film and the isolation-diffusion regiontogether. The structures of the device-isolation portions will bedetailed later.

It is further preferable that all the MOS transistors composing pixelsof the imaging region and the MOS transistors composing the drivingcircuit in the peripheral circuit region have the same structure, sothat the manufacturing process can be simplified.

The following description is about device-isolation portions among MOStransistors in the imaging region and the peripheral circuit region.

As described above, both the imaging region and the peripheral circuitregion have device-isolation portions configured by forming an isolationoxide film on a semiconductor substrate (hereinafter, referred to as ‘afirst embodiment’), or by forming an isolation-diffusion region within asemiconductor substrate (hereinafter, referred to as ‘a secondembodiment’).

FIG. 1A is a cross-sectional view showing device-isolation portions 13in the first embodiment. For each of the device-isolation portions 13,an isolation oxide film 18 is formed on a semiconductor substrate 11.The isolation oxide film 18 does not erode the semiconductor substrate11, and it is, for example, a deposited film formed on the flat surfaceof the semiconductor substrate. Such an isolation oxide film 18 can beformed, for example, by a CVD method.

FIG. 6 is a graph for comparing leakage currents that vary depending onisolation oxide films.

When the isolation oxide film 18 has a thickness as large as 800 nm (‘B’in FIG. 6), stress will be concentrated to end portions of the isolationoxide film 18 at the interface between the isolation oxide film 18 andeither the source 14 or the drain 15, due to an influence of heattreatment or the like carried out after formation of the isolation oxidefilm 18. As a result, the stress becomes greater and the leakage currentis increased to 1.3 times in a comparison with a case of an oxide film27 formed by LOCOS (local oxidation of silicon) illustrated as ‘A’ inFIG. 6. Preferably, the film thickness is decreased to not more than 500nm, preferably not more than 400 nm, more preferably not more than 250nm, so that the leakage current at the end portions of the isolationoxide film 18 can be decreased in comparison with the leakage current ofthe oxide film 27 formed by LOCOS (local oxidation of silicon). When thethickness of the isolation oxide film 18 is 250 nm (‘C’ in FIG. 6), theleakage current is as low as 0.8 times.

Since an LSI of a typical CMOS has a GND power source in the unit cells,current can leak from GND to VDD (e.g., 3V), passing beneath theisolation oxide film, and thus, the isolation oxide film should bethickened to be about 300 nm for improving voltage endurance fordevice-isolation. On the other hand, since an amplification type unitpixel does not always require a GND power source in the pixel, thethickness of the isolation oxide film 18 can be decreased to a range of4 nm to 250 nm, thereby decreasing the leakage current of the isolationoxide film 18.

Furthermore, by annealing in a hydrogen atmosphere after formation ofthe isolation oxide film 18, defects caused by stress at the endportions of the isolation oxide film 18 can be corrected. This canfurther decrease the leakage current to 0.4 times (‘E’ in FIG. 6).

In the insulating film shown in FIG. 1A, the isolation oxide film 18 isformed on the semiconductor substrate 11 together with an insulatingfilm in order not to erode the substrate. A test result shows that whena depth that the isolation oxide film 18 erodes the semiconductorsubstrate 11 is 50 nm or less, annealing in a hydrogen atmosphere candecrease leakage current, i.e., the leakage current indicated as D inFIG. 6 is 0.6 times the leakage current in the oxide film 27 formed byLOCOS (local oxidation of silicon).

FIG. 1B is a cross-sectional view of device-isolation portions in asecond embodiment. Each device-isolation portion 13 includes anisolation-diffusion region 19 formed within the semiconductor substrate11. According to the second embodiment, the effect of inhibiting leakagecurrent is further improved in comparison with the first embodiment. Theisolation-diffusion regions 19 will be p-type diffusion regions forisolating n-channel MOS transistors, while n-type diffusion regions areused for isolating p-type MOS transistors. The isolation-diffusionregions 19 can be formed by, for example, ion-implanting p-type orn-type impurities into a semiconductor substrate.

The impurity concentration and diffusion depth of theisolation-diffusion regions 19 will not be limited specifically as longas the MOS transistor 12 can be isolated electrically. The impurityconcentration is, for example, 10¹⁴ cm⁻³ to 10²² cm⁻³, preferably 10¹⁵cm⁻³ to 10²⁰ cm⁻³, further preferably 10¹⁷ cm⁻³ to 10²⁰ cm⁻³. Thediffusion depth is, for example, more than 0 μm and not more than 7 μm,preferably more than 0 μm and not more than 2 μm, further preferablymore than 0 μm and not more than 1 μm.

The device-isolation portion can have a structure for using both anisolation oxide film and an isolation-diffusion region (hereinafter, thestructure is referred to as ‘a third embodiment’). In the structure,even when leakage current occurs at the interface between the isolationoxide film and the semiconductor substrate, this leakage current can berecontacted in the isolation-diffusion region, thereby enhancing theeffect of decreasing the leakage current.

For the imaging region, it is preferable that the second embodiment isapplied for the structure of the device-isolation portion adjacent tothe photodiode, so that an excellent effect is obtained in inhibitingleakage current. Though the second embodiment can be used for the otherdevice-isolation portion in the imaging region, use of either the firstor third embodiment is particularly preferable, since the amplifyingcircuit in each pixel can be operated at high speed.

In the peripheral circuit region, it is preferable to use either thefirst or the third embodiment for the structure of the device-isolationportion, since the driving circuit can be operated at high speed.

The device-isolation portion in the imaging region and thedevice-isolation portion in the peripheral circuit region can beselected separately from the first, second and third embodiments.Preferred examples of the combinations are described below.

In a first combination, the device-isolation portion in the imagingregion and that in the peripheral circuit region have the samestructure. In this case, though the second embodiment can be used forthe device-isolation portion, the first or third embodiment is preferredparticularly.

In a second combination, the second embodiment is used for thedevice-isolation portion in the imaging region while the first or thirdembodiment is used for the device-isolation portion in the peripheralcircuit region. This structure can decrease leakage current leaking intothe photodiode and realize a high-speed operation of the drivingcircuit.

In a third combination, the second embodiment is used for thedevice-isolation portion adjacent to the photodiode in the imagingregion, and either the first or the third embodiment is used for theother device-isolation portions, and the first or the third embodimentis used for the device-isolation portion in the peripheral circuitregion.

Accordingly, leakage current leaking into the photodiode can bedecreased, and the driving circuit and the amplifying circuit in thepixel can be operated at high speed.

1. A MOS (metal-oxide-semiconductor) image pick-up device comprising: a semiconductor substrate, an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region comprising a driving circuit for operating the imaging region formed on the semiconductor substrate; where each of the unit pixels comprises: a photodiode, MOS transistors, and a first device-isolation portion comprising a portion next to the photodiode and a portion not next to the photodiode, and the peripheral circuit region comprises a second device-isolation portion for isolating devices in the driving circuit, wherein the following are satisfied: I. each of the first device-isolation portion not next to the photodiode and the second device-isolation portion has a structure comprising: A. an electrically insulating film formed on a surface of the substrate so as to erode the substrate to a depth in a range of 1 nm to 50 nm, or B. both an electrically insulating film formed on a surface of the substrate so as to erode the substrate to a depth in a range of 1 nm to 50 nm and an impurity diffusion region formed within the substrate, and II. each of the first device-isolation portions next to the photodiode has a structure consisting of only an impurity diffusion region formed within the substrate directly under the substrate surface.
 2. The MOS image pick-up device according to claim 1, wherein the impurity diffusion region is formed by ion implantation.
 3. The MOS image pick-up device according to claim 1, wherein at least one part of the driving circuit is a dynamic circuit.
 4. The MOS image pick-up device according to claim 1, wherein the photodiode has a surface portion having a dark current inhibiting layer.
 5. The MOS image pick-up device according to claim 1, wherein the first device-isolation portion and the second device-isolation portion are formed by annealing in a hydrogen atmosphere.
 6. A camera comprising a MOS (metal-oxide-semiconductor) image pick-up device comprising: a semiconductor substrate, an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region comprising a driving circuit for operating the imaging region formed on the semiconductor substrate; where each of the unit pixels comprises: a photodiode, MOS transistors, and a first device-isolation portion comprising a portion next to the photodiode and a portion not next to the photodiode, and the peripheral circuit region comprises a second device-isolation portion for isolating devices in the driving circuit, wherein the following are satisfied: I. each of the first device-isolation portion not next to the photodiode and the second device-isolation portion has a structure comprising: A. an electrically insulating film formed on a surface of the substrate so as to erode the substrate to a depth in a range of 1 nm to 50 nm, or B. both an electrically insulating film formed on a surface of the substrate so as to erode the substrate to a depth in a range of 1 nm to 50 nm and an impurity diffusion region formed within the substrate, and II. each of the first device-isolation portions next to the photodiode has a structure consisting of only an impurity diffusion region formed within the substrate directly under the substrate surface.
 7. The camera according to claim 6, wherein the impurity diffusion region is formed by ion implantation.
 8. The camera according to claim 6, wherein at least one part of the driving circuit is a dynamic circuit.
 9. The camera according to claim 6, wherein the photodiode has a surface portion having a dark current inhibiting layer.
 10. The camera according to claim 6, wherein the first device-isolation portion and the second device-isolation portion are formed by annealing in a hydrogen atmosphere.
 11. A MOS (metal-oxide-semiconductor) image pick-up device comprising: a semiconductor substrate, an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region comprising a driving circuit for operating the imaging region formed on the semiconductor substrate; where each of the unit pixels comprises: a photodiode, MOS transistors, and a first device-isolation potion, and the peripheral circuit region comprises a second device-isolation portion for isolating devices in the driving circuit, wherein the following are satisfied: I. the first device-isolation portion has a structure comprising: A. an electrically insulating film formed on a surface of the substrate so as to erode the substrate to a depth in a range of 1 nm to 50 nm, or B. an impurity diffusion region formed within the substrate directly under the substrate surface, and II. the first device-isolation portion and the second device-isolation portion have respective structures selected separately so as to be different from each other.
 12. A MOS (metal-oxide-semiconductor) image pick-up device comprising: a semiconductor substrate, an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region comprising a driving circuit for operating the imaging region formed on the semiconductor substrate; where each of the unit pixels comprises: a photodiode, MOS transistors, and a first device-isolation portion, and the peripheral circuit region comprises a second device-isolation portion or isolating devices in the driving circuit, wherein the following is satisfied: the first device-isolation portion and the second device-isolating portion are selected separately from respective structures comprising: A. an electrically insulating film formed on a surface of the substrate so as to erode the substrate to a depth in a range of 1 nm to 50 nm, or B. an impurity diffusion region formed within the substrate directly under the substrate surface.
 13. A camera comprising a MOS (metal-oxide-semiconductor) image pick-up device comprising: a semiconductor substrate: an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region comprising a driving circuit for operating the imaging region formed on the semiconductor substrate; where each of the unit pixels comprises: a photodiode, MOS transistors, and a first device-isolation portion, and the peripheral circuit region comprises a second device-isolation portion for isolating devices in the driving circuit, wherein the following is satisfied: I. the first device-isolation portion has a structure comprising: A. an electrically insulating film formed on a surface of the substrate so as to erode the substrate to a depth in a range of 1 nm to 50 nm, or B. an impurity diffusion region formed within the substrate directly under the substrate surface, and II. the first device-isolation portion and the second device-isolation portion have respective structures selected separately so as to be different from each other. 